As a Senior Verification Engineer at NVIDIA, you will be responsible for verifying the design, architecture and micro-architecture using advanced verification methodologies

Defining verification scope and driving the development of verification infrastructure, DV strategies and test-planning for memory subsystem units

Collaborate with ASIC designers and architects in feature and micro-architecture discussions.

You have a Bachelors or Masters Degree in Electrical Engineering or Computer Science or Computer Engineering (or equivalent experience)

4+ years of experience verifying a complex unit from start till tapeout for 1-2 generation of chips.

Knowledgeable in verification techniques such as constrained random sequences, scoreboard and functional coverage

Experience developing scalable code using Object Oriented Programming principles and proficient in SystemVerilog/UVM.

Familiarity with memory subsystem concepts such as memory consistency models, arbitration policies, interface protocols, on-chip interconnect

Passionate about delivering bug-free first silicon

Prior verification experience related to memory subsystem units like caches, xbar/interconnect fabric is a huge plus

Strong interpersonal skills

Knowledge and hand-on experience with AI tools and workflow.