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33 Rtl design engineer intern jobs in United States
- Fall 2026 Co-Op - Digital Design Engineer
Cirrus LogicGreensboro, NC$118K - $175K (Glassdoor est.)Candidates for this role must be able to access technical data without a requirement for an export license. Collaborate with the design team on integration and……4d - PD Intern
EtchedSan Jose, CAProgress towards a Bachelor’s, Master’s, or PhD degree in electrical engineering, computer engineering, or a related field.…30d+ - RTL InternEtchedSan Jose, CA$41K - $57K (Glassdoor est.)Progress towards a Bachelor’s, Master’s, or PhD degree in electrical engineering, computer engineering, or a related field.…30d+
- DV InternEtchedSan Jose, CA$36K - $53K (Glassdoor est.)Progress towards a Bachelor’s, Master’s, or PhD degree in electrical engineering, computer engineering, or a related field.…30d+
- HARDWARE ENGINEER INTERN - SUMMER 2027
IMC TradingChicago, IL$200K (Employer provided)Desire to collaborate with technical and non-technical teammates in a dynamic environment. Base salary is only one component of total compensation; all full-……16d - Senior Logic Design Engineer
NVIDIASanta Clara, CA$136K - $265K (Employer provided)Best Places to WorkPlatform and system design: Strong understanding or practical experiences with system design methodologies including board design, SI and familiarity with……30d+ - Digital Logic + Design Verification Graduate Co-Op Program (US - Fall 2026)
Marvell TechnologySanta Clara, CA$35.00 - $70.00 Per Hour (Employer provided)To support fair and authentic hiring practices, candidates are not permitted to use AI tools (such as transcription apps, real-time answer generators like……30d - Physical Design Intern
SK hynix memory solutionsSan Jose, CA$35.00 - $45.00 Per Hour (Employer provided)Collaborate with front-end design and verification teams to seamlessly integrate RTL changes and resolve physical design constraints.…18d - Design Engineering InternSK hynix memory solutionsSan Jose, CA$35.00 - $45.00 Per Hour (Employer provided)BS/MS degree (completed or in progress) in Electrical Engineering, Electronics, Computer Science, or a related field. Hours: 40 hours per week.…2d
- Physical Design Engineer (Sunnyvale, CA)
TachyumSunnyvale, CA$150K - $300K (Employer provided)Help define low latency/low skew clock tree methodology/design. Verilog knowledge and an understanding of ASIC design flow.…30d+ - Engineering Intern / Co-opOceanCommChicago, IL$73K - $114K (Employer provided)This is a hands-on role for students in electrical and computer engineering, mechanical engineering, or related technical programs who want real experience at……30d+
- Sr. ASIC Design Engineer
Hewlett Packard Enterprise | HPERoseville, CA$154K - $311K (Employer provided)Knowledge of synthesis/lint and other state-of-the-art EDA tools is desired. Any candidate/individual who relies on the erroneous representations made by……30d+ - ASIC Design EngineerHewlett Packard Enterprise | HPESunnyvale, CA$120K - $243K (Employer provided)Knowledge of synthesis/lint and other state-of-the-art EDA tools is desired. Any candidate/individual who relies on the erroneous representations made by……30d+
- Principal ASIC Design EngineerHewlett Packard Enterprise | HPESunnyvale, CA$174K - $353K (Employer provided)Determines architecture and logic design, design verification through software developed for component and system simulation and builds physical implementations……30d+
- ASIC Design Engineer - New College Grad 2026NVIDIASanta Clara, CA$100K - $190K (Employer provided)Best Places to WorkVerilog expertise required as is a deep understanding of ASIC design flow including RTL design, verification, logic synthesis, prototyping, DFT, timing analysis……24h
- Senior Design Engineer, Coherent High Speed InterconnectNVIDIASanta Clara, CA$168K - $311K (Employer provided)Best Places to WorkYou will be working on architecture and design of our state-of-the-art high speed coherent interconnects (NVLINK-C2C) for our mobile SoCs and GPUs.…30d+
- Senior FPGA or ASIC Engineer
MITREBedford, MADemonstrated technical leadership in FPGA design and verification methodologies (UVM, OVM). Experience working across all phases of digital design, including……30d+ - Electrical Engineer, Compute Architecture
NeuralinkAustin, TX$105K - $176K (Employer provided)This role offers substantial autonomy and the exciting opportunity to own creative decisions and execute on new, impactful projects such as high-speed image……30d+ - Hardware/ Software Co-Design EngineerNeuralinkFremont, CA$151K - $261K (Employer provided)Evidence of exceptional ability in electrical engineering, computer science, or computer engineering. Our Hardware/ Software Co-Design Engineer will be……30d+
- Digital IC Design EngineerNeuralinkFremont, CA$116K - $234K (Employer provided)Evidence of exceptional ability in electrical engineering, computer science, or computer engineering. Our Digital IC Design Engineer will be responsible for……30d+
- Staff FPGA Design Engineer
Ursa Major TechnologiesBerthoud, CO$150K - $180K (Employer provided)Graduate degree in related engineering or technical field with 15+ years of direct experience in electronics hardware development. Equity Grants in the Company.…8d - HARDWARE MACHINE LEARNING PHD RESEARCH INTERNSHIPIMC TradingChicago, IL$225K (Employer provided)Experience with hardware fundamentals, whether through VHDL/SystemVerilog development, HLS tools, or ML-to-hardware frameworks like hls4ml, FINN, or Vitis AI.…30d+
- Electrical Engineer, ASIC Program Lead-CA
SynchronSan Diego, CA$160K - $260K (Employer provided)Contribute to design reviews, technical risk assessments, FMEA, verification documentation, regulatory documentation, and design history files.…30d+ - Member of Technical Staff - Research Intern
Bamboo Lab ArchitectPalo Alto, CA$161K - $246K (Glassdoor est.)Familiarity with hardware design concepts (Verilog, RTL, EDA tools), though not required. Our goal is to reimagine chip design using AI, cut down ASIC design……30d+ - Verification Engineer Intern
AmbarellaUnited StatesWe are looking for talented engineers who possess a strong interest in VLSI design, programming and computer architecture.…30d+ - ASIC Design Engineer InternAmbarellaUnited StatesGood understanding of computer architecture, logic design and VLSI design. Logic design, implementation, and verification using Verilog, System Verilog, and any……30d+
Cirrus Logic
Fall 2026 Co-Op - Digital Design Engineer
Greensboro, NC
$118K - $175K (Glassdoor est.)
