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      Cisco interviews FAQs

      • Common stages of the interview process at Cisco as a Digital Design Engineer according to 1 Glassdoor interviews include:

        Skills test:  33%

        Phone interview:  33%

        One on one interview:  33%

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      Jobs at Cisco

      108 jobs in United States
      Software Engineer– Full Stack
      San Jose, CA
      ·
      $136K - $252K /yr
      (Employer provided)
      View job
      Software Engineering Technical Leader
      Boxborough, MA
      ·
      $164K - $303K /yr
      (Employer provided)
      View job
      Customer Escalations Engineering Technical Leader
      San Francisco, CA
      ·
      $164K - $303K /yr
      (Employer provided)
      View job
      Staff Engineering Product Manager (Remote)
      San Francisco, CA
      ·
      $149K - $277K /yr
      (Employer provided)
      View job
      Software Engineering Manager - ASIC Simulation - San Jose, CA
      San Jose, CA
      ·
      $211K - $351K /yr
      (Employer provided)
      View job
      View all Digital Design Engineer Jobs

      Digital Design Engineer Interview

      Nov 15, 2014
      Anonymous Interview Candidate
      Staines, England
      No offer
      Difficult interview

      Application

      I applied through a recruiter. I interviewed at Cisco (Staines, England) in Jun 2012

      Interview

      I was contacted directly by HR from my profile in LinkedIn. I was interviewed by two technical guys. One senior and one junior. The senior was looked confident and professional. The junior guy was a little arrogant. I had one hour first meeting the senior guy who pushed me all the way with a tough problem. The junior guy came second and we met for half and hour. This was long enough to see how unprepared he was for interviewing, most questions ill posed. A total disaster.

      Interview questions [1]

      Question 1

      Clock domain crossings in cases where very fast sending signals arriving at a much slower clock domain. How to capture without losing any incoming signal event into the slow clock domain? No idea as to how frequent or how long incoming events appear.
      1 Answer