I applied online. I interviewed at HPR in Jul 2021
Interview
1. 30 mins phone screening with the hiring director.
2. 45 mins hackerrank meeting with a hardware team member.
Never get back to me after the 2nd process. The questions that I had been asked are very easy and I had the answers right away, so I didn't explain my thoughts. make sure you explain how you get the answers.
Interview questions [1]
Question 1
1. 30 mins phone screening about my resume and my background.
2.
a) fill out a truth table for 4 to 1 mux.
b) implement an 8 to 1 mux with 3 given 4 to 1 mux.
c) 1)Given few declared variables in a struct C/C++, calculates the total number of bits that allocate and occupy in the memory.
EX. ..... char hello; uint_32 hi[5];....... ANS: total bits of memory require = 8 + 32 * 5 = 168 bits.
2) Imagine that an HDL code is sending 168 bits of data to the two variables in struct C/C++. Fill out the bit length of each variable.
ANS: hello[7:0] and hi[167:8].
Very easy questions.
FPGA Design and Verification Engineer I applicants have rated the interview process at HPR with 1 out of 5 (where 5 is the highest level of difficulty) and assessed their interview experience as 100% positive. To compare, the company-average is 59.1% positive. This is according to Glassdoor user ratings.
Common stages of the interview process at HPR as a FPGA Design and Verification Engineer I according to 1 Glassdoor interviews include:
Presentation: 50%
One on one interview: 50%
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