Test followed by technical interview and HR interview. It was campus placement. I qualified the test and technical interview, but did not get job offer. Questions were regular vlsi interview areas.
Interview questions [1]
Question 1
mealy and moore state diagram sequence generator, question regarding course project
Two consecutive 1.5 hours technical interviews with tech lead/ manager.
Two 1 hour less technical more personal interviews with higher ranking managers. Technical interviews were back to back and further interviews one at a time.
Interview questions [1]
Question 1
Design a FIFO - draw block diagram. Afterwards - add simultaneous push pop, and enable instantaneous pop.
I applied online. The process took 1 week. I interviewed at Qualcomm (Bengaluru) in Nov 2022
Interview
Total 3 rounds. Each Round is 40 Minutes. First Round: Self Introduction CDC RDC Basic Questions in Verilog. Second Round: Async FIFO Logical Digital Design Questions. Third Round: About project which I worked on previous company.
Interview questions [1]
Question 1
Why Gray codes prefer instead of Binary Codes? What is Data Incoherency?
Rtl Design Engineer applicants have rated the interview process at Qualcomm with 3 out of 5 (where 5 is the highest level of difficulty) and assessed their interview experience as 100% positive. To compare, the company-average is 62.5% positive. This is according to Glassdoor user ratings.
Common stages of the interview process at Qualcomm as a Rtl Design Engineer according to 1 Glassdoor interviews include:
Skills test: 50%
One on one interview: 50%
Here are the most commonly searched roles for interview reports -