Asked questions about clock domain crossing , low power techniques
Asic Engineer Interview Questions
1,319 asic engineer interview questions shared by candidates
1. Tell me a little about yourself. 2. What got you interested in FPGAs?
Wie würden Sie die Herausforderung lösen, wenn ein kritischer Timing-Fehler im finalen ASIC-Tapeout entdeckt wird?
tlm and its benefits. difference between blocking and nonblocking transactions
detailed test plan for a synchronous fifo
- about SV, FIFO design, arbiter design
What are the 4 pillars of OOP? Was shown a symbol of a multiplexer, how does it work? How can you make an OR gate from an AND gate?
what is your salary expectations
some questions are common like, what will you become in 3-5 years? weak and strength, team work, how u deal with difficult situation, and so on. They really want to know what kind of person you are. But some questions are very rude, what your parents do in aspect of career? normally it isn't allowed
Then asks questions in SV & UVM starting from basic concepts to transaction level modelling & even asks you to develop a UVC for a protocol.
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