Details of setup and hold time, basic digital design questions on mux and different flip-flops, transistor sizing, leakage control, Verilog coding etc.
Circuit Design Engineer Interview Questions
154 circuit design engineer interview questions shared by candidates
Setup and hold time, Leakage and dynamic power, sizing of transistors in combinational gates
1. Digital custom design - setup/hold constraints, clock skews, crosstalks, layout related clock routing queries, wire delay.
Very fundamental questions. Wasn't prepared for that.
What steps can we take to improve the INL and DNL of ADC
Quale è stata la tua esperienza accademica? Cosa hai imparato durante il percorso di studi? Quali tool hai usato?
Other than what people have posted, they asked me Step and ramp responses for a RC-Low pass and RC-high pass filter. What frequency components does slow varying ramp has? Building basic gates from 2*1 Mux. Inverter with feedback and input resistance, how does the Vm of the inverter vary?
What is your expected salary?
Coding test, synchronous fifo and FSM
technical question circuit transient analysis
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