Set up and hold time question Mod - 10 up-down counter it should count 0-9 9-0 simultaneously. Generate a pulse signal when positive edge is detected
Digital Design Interview Questions
823 digital design interview questions shared by candidates
Why I had applied to micron
Lot of questions in digital design
Ask to make an inverter from both CMOS and BJT. Also ask advantages and disadvantages of each.
setup time,hold time timming analysis , vlsi design flow
More questions in CDC, Constraints used in SDC and about Primetime report.
Two or Three basic questions on power speed optimization in static CMOS
Which parameters are to be considered to choose value of the bypass capacitor
Asynchronous fifos, critical path timing, formal verification, clock gating, hight vt vs low vt
DDR2 initialization engine synthesis issues (from my resume).
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