C++ and verilog, fpga questions
Fpga Design Engineer Interview Questions
151 fpga design engineer interview questions shared by candidates
Asked about the OA (1st round), like explain your answers..
Bus protocols like SPI, ARM etc
Reverse an array in-place
Delay the bus signal with BRAM.
Easy questions like write DFF etc.
You have a device connected with a I2C bus. You send the data to the FIFO inside this device. How can you let the master know about FIFO overflow?
Can't remember.
Questions related to CDC and Verilog/VHDL. one behavioral question. Questions from the resume.
Previous experience and coding part
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