You have a device connected with a I2C bus. You send the data to the FIFO inside this device. How can you let the master know about FIFO overflow?
Fpga Interview Questions
681 fpga interview questions shared by candidates
Explain how fifo works and how metastabilty works and how to mitigate it
Questions related to CDC and Verilog/VHDL. one behavioral question. Questions from the resume.
When we need to partition our system on multiple fpgas?
How the FPGA works, what does it consists of? Types of communication busses and protocols (UART, SPI, I2C, PCI-express ...). Meta-stable condition. What is FIFO?
Bus protocols like SPI, ARM etc
Can't remember.
Previous experience and coding part
Based on FPGA Application Engineer role.
OOP concept . like drawing problem. design object to do that.
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