Graphics Software Engineer Interview Questions

1,191 graphics software engineer interview questions shared by candidates

a. Check if a number is a power of 2. b. GLSL shader debug c. Pointers d. Memory allocation and deallocation – 2D matrix e. Explain the graphics pipeline f. What is the GPU architecture/ programming model ? g. Can we have the depth testing before the fragment shader? h. What is a particular case when we would need depth testing after the fragment shader i. Design a parking garage j. Cycle in a directed graph…. k. SetBit/ClearBit/isBitSET l. Implement your own memoryAlloc function m. Delete nodes with a particular value in a LinkedList n. Allocate a 2D array using malloc and access its elements o. Opengl vs openglES (OpenGL basics) p. How would you debug a memory leak. r. At what GL call does the command buffer submission happen ?
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Senior Graphics Software Engineer

Interviewed at Apple

4.2
Nov 5, 2024

a. Check if a number is a power of 2. b. GLSL shader debug c. Pointers d. Memory allocation and deallocation – 2D matrix e. Explain the graphics pipeline f. What is the GPU architecture/ programming model ? g. Can we have the depth testing before the fragment shader? h. What is a particular case when we would need depth testing after the fragment shader i. Design a parking garage j. Cycle in a directed graph…. k. SetBit/ClearBit/isBitSET l. Implement your own memoryAlloc function m. Delete nodes with a particular value in a LinkedList n. Allocate a 2D array using malloc and access its elements o. Opengl vs openglES (OpenGL basics) p. How would you debug a memory leak. r. At what GL call does the command buffer submission happen ?

Asked questions on Computer Architecture, C++, system verilog, OVM UVM. Also skills on scripting languages such as python and ruby was tested. Draw DUT testbench for systemVerilog. What is TLB. What is cache Memory Hierarchy
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Graphics Hardware Engineer

Interviewed at Intel Corporation

3.9
Mar 3, 2021

Asked questions on Computer Architecture, C++, system verilog, OVM UVM. Also skills on scripting languages such as python and ruby was tested. Draw DUT testbench for systemVerilog. What is TLB. What is cache Memory Hierarchy

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