Where is the largest resistance of the analog switch
Mixed Signal Design Interview Questions
189 mixed signal design interview questions shared by candidates
Whether you have any silicon layout experience?. What happens if the capacitor is connected between the output and input nodes of the common source amplifier.
What is the input offset voltage for a folded cascode amplifier
Recruiter questions: 1. Why this job? 2. What happens to performance of invertor when body is tied to -ve voltage? 3. How will propagation delay of invertor scaled with sizes of PMOS and NMOS? Director phone screen: 1. MOSFET capacitance variation with gate voltage, list three regions this C. 2. I-V characteristic of NMOS whose drain is tied to Vdd, Source/Body to Gnd and Gate.voltage is sweep from 0 to Vdd. Mention different regions of this curve. 3. How will NMOS drain current scale with temperature variation? 4.Consider a blackbox circuit that sources current 'I'. What tests will you perform on it?
Cross section of conventional MOS transistor with parasitics. Vertical power MOS. Folded cascode, transfer function, indicate what nodes bring the poles of the circuit. Fundamentals of noise and matching. Draw a buck-converter with P.I. feedback.
ON site: presentation of things encountered in your career
phone interview: describe past power management designs 2) what are non-ideal characteristics of opamps: A: phase response---stability finite open loop gain (distortion increases with frequency) noise currrent and voltage offsets
how do you minimize offset error? (opamp circuit)
What is the difference between latches and flip-flops? What is the output of a flip-flop if the output is passed through an inverter and then fed back to the input?
Mobility questions, how to build a NAND and NOR gate, and the one I failed was about a transistor in cutoff where you need the drain voltage.
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