for the MOS opamp, what happens if W is too large
Mixed Signal Design Interview Questions
189 mixed signal design interview questions shared by candidates
make an AND gate from two Nmos
How will you model unity gain voltage amplifier
Why did you not raise alarm on a certain issue? (I didn't think it was that important, but the interviewer thinks it is very important - again a smile that hints that my team is not doing the right thing, according to him).
Some DAC noise design consideration
LDO output noise
What is the difference between == and === ? What is the use of reg in verilog?
Very basic questions(which were easy if we come out of college or recent grad but very unexpected for an experienced candidate, since we don't need to do all that at hand calculation level everytime), Although figured out most of them but couldn't give satisfactory answers as I was rusty in few topics(my mistake too, could review those concepts because of poor time management) The recruiter was pretty rude too, which again was kind of demotivating, especially when we try to figure out things on which we turned rusty.
1. Basic questions around transistors - particularly large W/L ratio ones. 2. A couple of circuits with pmos and nmos in a current mirror configuration - I was asked what would be the node voltages as a function of input to one of the transistor's gate. 3. Layout/cross section of inverter and small signal model of MOSFET
presentation part II:
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