Design an XOR gate in CMOS
Physical Design Engineer Interview Questions
711 physical design engineer interview questions shared by candidates
Microelectronics
I was given a diagram and needed to identify hold/ setup violation. and how to solve them.
List 3 things that you are interested in this role the most.
how would a physical design engineer remove routing congestion issues in the design.
STA Static power/Dynamic power signal integrity ( cross talk ) some questions related to my resume
Explain you array multiplier project
Working of SRAM where should we place the late arriving input in Nand gate
explain the terms: setup and hold times, cmos inverter. use graphs and equations to explain.
Explain what ssgnp means in the name of the corner
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