about finite state machine: moore and mealy
Physical Design Interview Questions
712 physical design interview questions shared by candidates
D FF transmission gate implementation, then gave delays of the jam latch and the TG, asked to tell the setup and hold time.
temperature inversion
Explain setup and hold timing
CMOS inverter and buffer schematic explanation.
What is the differences between full custom design and automatic PnR design?
ASIC design flow along with TCL
Explain PD flow? Questions on projects done before
Tell me yourself and the tool you worked with
What is the difference between setup and hold timings?
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