state machines, FIFOs sync and non-sync, clock domain crossing, meta stability, buses
Software Design Engineer Interview Questions
31,086 software design engineer interview questions shared by candidates
Write the latch verilog code
Design a FSM for outputting x/3 without the remainder.
about projects , global routing
Some flip flop questions, logic design questions, and static timing questions
What do you know about Rolls-Royce?
Asked about Cache math
question will be on structural design related and few apptitude
difference between setup and hold time
about dff and clocks
Viewing 1491 - 1500 interview questions