What products of the company do you know? tell me a project you have done in the past and what did you learn form it..what would you change.. write 2 little projects in VHDL or Verilog (a state machine and a counter).. explain what you did..
Verification Design Engineer Interview Questions
1,116 verification design engineer interview questions shared by candidates
Questions mostly about the project. Basics of Pcie protocol
UVM concepts, assertions, tb arch
FIFO, LIFO in Verilog
It gets very technical ranging from Electrical fundamentals to RF fundamentals and then they start to dig deep on each aspect. Know your chip caps really well! I was asked questions on smith charts, imedance matching, typical RF receiver/transmitter systems, signal integrity issues, characteristics of RF amps. As far as behavioral questions were concerned - challenges faced in your last project, how did u solve it and what would your ex boss say about you if I asked him for a reference.
Questions related to pipelining, hazards, in-order processor, out of order processor, Register renaming, branch prediction, caches and virtual memory
Lcm, Swap, Factorial for C coding Write constraints in system verilog
That's all i can share . Practice your basics. All the best !
Decode a CMOS transistor diagram (complex)
Some basic questions/tasks about C programming (pointers, arrays..), design task for receiving data bytes from the transmitter (C programming), Asked to explain different parts of some old SOC configuration. For people studying only Electronics I would suggest going through Software Engineering lectures from other courses to know about how memory is managed in a SOC and CPU. Ideally read about the Architecture of CPU and Microcontrollers as I was asked this in all 3 Interviews with ARM. I only studied Electronics and had no courses related to this except when we briefly looked into simple microcontrollers without going into detail so it was good decision going through Software Engineering course notes before the interview.
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