System verilog constraints,c programs and data structures
Verification Interview Questions
3,815 verification interview questions shared by candidates
Asked me to tell about myself, past work I’ve done, what do I expect from my new team, manager, etc.
some string manipulations in c
What would I do if there is a conflict with a team member. What I have done in my current job.
Dont remember much but mostly code deep dives and situational questions related to work.
describe UVM Phases and difference bet run phase and main phase
Draw the circuit base on the coding provided
Power of 2, asynchronized and synchronized reset
1. C++, OOP 2. python: dictionary, swap values 3. Systemverilog: fork join 4. delete repeated element in an array 5. FIFO depth 6. find SA0/SA1 amoung 128 wires in minimal steps
Design an fifo using the language of your choice and describe your thought process
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