Basic digital verilog system verilog uvm
Verification Specialist Interview Questions
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1.Brief introduction 2.Explanation of the projects 3.Protocol related questions 4.UVM related questions 5.SV related questions
About my experience, about old and this new company, my motivation towards joining Pokerstars
Questions on SV, UVM and pcie
How do you design a priority encoder
Design a d latch using 2:1 MUX?
What is the difference between latch and flipflop
Basic questions on digital like flip flop, latches ,verilog pattern detector code ,connection types,system verilog OOPs concepts ,arrays ,Basic questions on UVM like factory,common phases.
What is the Y model. Asked a bunch of questions on Digital Logic Design. 2 puzzles.
They asked About Projects initially and then core
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