Setup and Hold time for full cycle and half cycle paths. Show which capture clock edge is setup time checked at and which edge hold time is checked at.
Physical Design Engineer Interview Questions
711 physical design engineer interview questions shared by candidates
Physical design related theory questions
according to your previous projects.
Inputs and outputs to each stage in the vlsi design
What is setup & hold MOSFET basics Digital & analog electronics basics Basic pv knowledge & PD flow
Cmos transistor behavior and questions on my projects
About my projects, CMOS transistors, STA
IR drop
Describe what have you done in previous job.
How do you plan to study your Masters?
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