First Phone interview Computer Architecture stuff: OOO, memory dependencies, Piplelining, Fetch stage, Branch Prediction System Verilog: coverage and assertion writing Digital Logic: Implement AND and OR using 2:1 mux Asked to rate myself in C++, System Verilog Second Phone Interview: Similar Comp Architecture questions C program to sort array. Binary search vs Linear Search. Time complexity.
Verification Design Engineer Interview Questions
1,116 verification design engineer interview questions shared by candidates
About digital electronics for VLSI domain
Why modport is used? What is polymorphism? What is deep copying ? what is inheritence? Why we are writing interface? Different Phases in UVM? Which phase are task and which are functions?
Then asks questions in SV & UVM starting from basic concepts to transaction level modelling & even asks you to develop a UVC for a protocol.
Not Applicable and confidential as per norms
My projects which was relevant to job role
Asked me questions on Tessent tool
My experience was bad in 2 rounds otherwise good in other 3 rounds.
Basic question on UVM?
implement blackjack with classes in python
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