ACL Digital
Part of ALTEN
Engaged Employer
Recent salaries shared by ASIC Design Verification Engineer at ACL Digital
Job Title | Years of Experience
Total Pay
Base • Additional pay
Location
Date submitted
Job Title | Years of Experience
Location
Date submitted
Total Pay
Base • Additional pay
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ACL Digital pay FAQs
- The average salary for ASIC Design Verification Engineer is $186,935 per year (estimate) in US, which is 41% higher than the average ACL Digital salary of $132,979 per year (estimate) for this job.
- ACL Digital employees working as ASIC Design Verification Engineer in US have attributed a compensation and benefits rating of 2.4 out of 5 stars, based on 2 ratings. This is 20% higher than the average of ASIC Design Verification Engineer professionals at ACL Digital worldwide.
- The salary trajectory of a ASIC Design Verification Engineer ranges between locations and employers. The salary starts at $87,480 per year (estimate) and goes up to $219,348 per year (estimate) for the highest level of seniority.
- The estimated average salary for a ASIC Design Verification Engineer at ACL Digital is $186,935 per year or $90 per hour, but some professionals have reported earning up to roughly $280,038 per year (90th percentile). The typical pay range is between $152,939 (25th percentile) and $231,979 (75th percentile) annually. This is based on 3 salaries submitted by ACL Digital ASIC Design Verification Engineer professionals on Glassdoor, as of Jul 2026.
- ASIC Design Verification Engineer professionals typically earn between $74 and $112 per hour.
- ASIC Design Verification Engineer professionals typically earn between $12,745 and $19,332 monthly.
