Recent salaries shared by ASIC Design Verification Engineer at Marvell Technology
Job Title | Years of Experience
Total Pay
Base • Additional pay
Location
Date submitted
Job Title | Years of Experience
Location
Date submitted
Total Pay
Base • Additional pay
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Marvell Technology pay FAQs
- The average salary for ASIC Design Verification Engineer is $186,958 per year (estimate) in US, which is 2% higher than the average Marvell Technology salary of $183,259 per year (estimate) for this job.
- Marvell Technology employees working as ASIC Design Verification Engineer in US have attributed a compensation and benefits rating of 5 out of 5 stars, based on 6 ratings. This is 25% higher than the average of ASIC Design Verification Engineer professionals at Marvell Technology worldwide.
- The salary trajectory of a ASIC Design Verification Engineer ranges between locations and employers. The salary starts at $87,468 per year (estimate) and goes up to $219,334 per year (estimate) for the highest level of seniority.
- The estimated average salary for a ASIC Design Verification Engineer at Marvell Technology is $186,958 per year or $90 per hour, but some professionals have reported earning up to roughly $280,060 per year (90th percentile). The typical pay range is between $152,962 (25th percentile) and $232,003 (75th percentile) annually. This is based on 30 salaries submitted by Marvell Technology ASIC Design Verification Engineer professionals on Glassdoor, as of Jul 2026.
- ASIC Design Verification Engineer professionals typically earn between $74 and $112 per hour.
- ASIC Design Verification Engineer professionals typically earn between $12,747 and $19,334 monthly.